ECAP5-DPROC Logo
1.0.0-alpha1

Specifications

  • Architecture Document
    • 1. Introduction
      • 1.1. Purpose
      • 1.2. Intended Audience and Use
      • 1.3. Product Scope
      • 1.4. Conventions
        • 1.4.1. Requirement format
      • 1.5. Definitions and Abbreviations
      • 1.6. References
    • 2. Overall Description
      • 2.1. User needs
      • 2.2. Assumptions and Dependencies
    • 3. Requirements
      • 3.1. External Interface Requirements
      • 3.2. Functional Requirements
        • 3.2.1. Register file
        • 3.2.2. Instruction decoding
        • 3.2.3. Immediate encoding
        • 3.2.4. Opcodes
        • 3.2.5. Instruction behaviors
          • 3.2.5.1. LUI
          • 3.2.5.2. AUIPC
          • 3.2.5.3. JAL
          • 3.2.5.4. JALR
          • 3.2.5.5. BEQ
          • 3.2.5.6. BNE
          • 3.2.5.7. BLT
          • 3.2.5.8. BGE
          • 3.2.5.9. BLTU
          • 3.2.5.10. BGEU
          • 3.2.5.11. LB
          • 3.2.5.12. LH
          • 3.2.5.13. LW
          • 3.2.5.14. LBU
          • 3.2.5.15. LHU
          • 3.2.5.16. SB
          • 3.2.5.17. SH
          • 3.2.5.18. SW
          • 3.2.5.19. ADDI
          • 3.2.5.20. SLTI
          • 3.2.5.21. SLTIU
          • 3.2.5.22. XORI
          • 3.2.5.23. ORI
          • 3.2.5.24. ANDI
          • 3.2.5.25. SLLI
          • 3.2.5.26. SRLI
          • 3.2.5.27. SRAI
          • 3.2.5.28. ADD
          • 3.2.5.29. SUB
          • 3.2.5.30. SLT
          • 3.2.5.31. SLTU
          • 3.2.5.32. XOR
          • 3.2.5.33. OR
          • 3.2.5.34. AND
          • 3.2.5.35. SLL
          • 3.2.5.36. SRL
          • 3.2.5.37. SRA
          • 3.2.5.38. FENCE
          • 3.2.5.39. ECALL
          • 3.2.5.40. EBREAK
        • 3.2.6. Exceptions
        • 3.2.7. Memory interface
          • 3.2.7.1. Memory accesses
          • 3.2.7.2. Wishbone protocol
          • 3.2.7.3. Caches
        • 3.2.8. Debugging
      • 3.3. Non-functional Requirements
    • 4. Configuration
      • 4.1. Instanciation parameters
    • 5. Architecture Overview
      • 5.1. Clock domains
      • 5.2. Functional partitioning
      • 5.3. Hazard management
        • 5.3.1. Pipeline stall
        • 5.3.2. Structural hazard
        • 5.3.3. Data hazard
        • 5.3.4. Control hazard
      • 5.4. Module interfaces

Reports

  • Test and Traceability Report
ECAP5-DPROC
  • Architecture Document
  • View page source

Architecture Document

../_images/architecture.svg

Table of Contents

  • 1. Introduction
    • 1.1. Purpose
    • 1.2. Intended Audience and Use
    • 1.3. Product Scope
    • 1.4. Conventions
      • 1.4.1. Requirement format
    • 1.5. Definitions and Abbreviations
    • 1.6. References
  • 2. Overall Description
    • 2.1. User needs
    • 2.2. Assumptions and Dependencies
  • 3. Requirements
    • 3.1. External Interface Requirements
    • 3.2. Functional Requirements
      • 3.2.1. Register file
      • 3.2.2. Instruction decoding
      • 3.2.3. Immediate encoding
      • 3.2.4. Opcodes
      • 3.2.5. Instruction behaviors
      • 3.2.6. Exceptions
      • 3.2.7. Memory interface
      • 3.2.8. Debugging
    • 3.3. Non-functional Requirements
  • 4. Configuration
    • 4.1. Instanciation parameters
  • 5. Architecture Overview
    • 5.1. Clock domains
    • 5.2. Functional partitioning
    • 5.3. Hazard management
      • 5.3.1. Pipeline stall
      • 5.3.2. Structural hazard
      • 5.3.3. Data hazard
      • 5.3.4. Control hazard
    • 5.4. Module interfaces

Revision history

Date

Revision

Changes

11-May-2024

1.0.0-alpha1

Initial pre-release

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