Memory Map and Registers
Address Offset |
Register name |
Width (in bits) |
Access |
Reset value |
Section/page |
|---|---|---|---|---|---|
0000_0000h |
Status register (UART_SR) |
32 |
R |
0000_0000h |
|
0000_0004h |
Control register (UART_CR) |
32 |
R/W |
0000_0000h |
|
0000_0008h |
Receive Data register (UART_RXDR) |
32 |
R |
0000_0000h |
|
0000_000Ch |
Transmit Data register (UART_TXDR) |
32 |
W |
0000_0000h |
Status register (UART_SR)
Position |
Field |
Description |
|---|---|---|
31-5 |
Reserved |
This field is reserved. This read-only field is reserved and always has the value 0. |
4 |
PE |
Parity Error This bit is cleared after reading it. 0 No parity error 1 Parity error detected |
3 |
FE |
Framing Error This bit is cleared after reading it. 0 No framing error 1 Framing error detected |
2 |
RXOE |
Receive Overrun Error This bit is cleared after reading it. 0 No received overrun error 1 A packet was received but RXNE is asserted |
1 |
TXE |
Transmit register Empty 0 The transmit register is full (being sent) 1 The transmit register is empty |
0 |
RXNE |
Receive register Not Empty 0 The receive register is empty (no data) 1 The receive register is not empty empty |
Control register (UART_CR)
UART_CR contains the control for selecting the UART baudrate, parity, size and stop bits.
Position |
Field |
Description |
|---|---|---|
31-16 |
ACC_INCR |
Accumulator increment/Baudrate selector The specified accumulator increment determines the baud rate with the formula ACC_INCR = round(baudrate * 2^15 / freq). |
15-4 |
reserved |
This field is reserved. This read-only field is reserved and always has the value 0. |
3 |
DS |
Data Size selector 0 7-bit data 1 8-bit data |
2 |
S |
Stop bit selector 0 1 stop bit 1 2 stop bits |
1-0 |
P |
Parity bit selector 00 No parity checks 01 Odd parity 10 Even parity 11 reserved |
Receive Data register (UART_RXDR)
Position |
Field |
Description |
|---|---|---|
31-8 |
reserved |
This field is reserved. This read-only field is reserved and always has the value 0. |
7-0 |
RXD |
Receive Data The received data is written to this field. The field is cleared by hardware after being read. |
Transmit Data register (UART_TXDR)
Position |
Field |
Description |
|---|---|---|
31-8 |
reserved |
This field is reserved. |
7-0 |
TXD |
Transmit Data Data written to this field is sent through the serial link. The TXE field of the UART_SR shall be sample before writing again to this field to prevent data loss. |